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Espressif Systems /ESP32-S3 /DMA /IN_CONF1_CH1

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Interpret as IN_CONF1_CH1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DMA_INFIFO_FULL_THRS0 (IN_CHECK_OWNER)IN_CHECK_OWNER 0IN_EXT_MEM_BK_SIZE

Description

Configure 1 register of Rx channel 0

Fields

DMA_INFIFO_FULL_THRS

This register is used to generate the INFIFO_FULL_WM_INT interrupt when Rx channel 0 received byte number in Rx FIFO is up to the value of the register.
IN_CHECK_OWNER

Set this bit to enable checking the owner attribute of the link descriptor.
IN_EXT_MEM_BK_SIZE

Block size of Rx channel 0 when DMA access external SRAM. 0: 16 bytes 1: 32 bytes 2/3:reserved

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data